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This structure is used by the
CardGetParsedTuplefunction to return data for the
CISTPL_CFTABLE_ENTRY tuple code. This structure represents, in a
fixed form, the information contained in a variable-length
CISTPL_CFTABLE_ENTRY tuple code as parsed by
CardGetParsedTuple.
[OUT] Specifies the power description for the Vcc voltage
supply.
Vpp1Descr
[OUT] Specifies the power description for the Vpp1 voltage
supply.
Vpp2Descr
[OUT] Specifies the power description for the Vpp2 voltage
supply. If the
ValidMaskmember of the
POWER_DESCstructure indicates no valid voltage values for
Vpp2, the values in
Vpp1Descrdescribe both Vpp1 and Vpp2.
IOLength[MAX_IO_RANGES]
Specifies an array of the lengths of the I/O address ranges
described by this CISTPL_CFTABLE_ENTRY.
IOLength[0] is the length of the I/O address range starting
at address
IOBase[0].
IOBase[MAX_IO_RANGES]
[OUT] Specifies an array of the base addresses of the I/O
address ranges described by this CISTPL_CFTABLE_ENTRY.
NumIOEntries
[OUT] Specifies the number of I/O addresses in the arrays
IOLengthand
IOBase.
ConfigIndex
[OUT] Specifies a configuration index value. The PC Card
conforms to the behavior described by this CISTPL_CFTABLE_ENTRY if
this value is written to the configuration option register. See
CardRequestConfiguration.
ContainsDefaults
[OUT] The values described by this CISTPL_CFTABLE_ENTRY can be
used as defaults for subsequent CISTPL_CFTABLE_ENTRY parsing.
IFacePresent
[OUT] If this member is not 0, the
IFaceType,
BVDActive,
WPActive,
ReadyActive, and
WaitRequiredmembers contain valid values.
IFaceType
[OUT] Specifies one of the following interface types:
Value
Description
0 (0)
Indicates a memory-only interface.
1
Indicates an I/O interface.
2, 3
Reserved.
4–7
Indicates a custom interface.
8–15
Reserved.
BVDActive
[OUT] Specifies TRUE if BVD1 and BVD2 are active in the pin
replacement register (PRR).
WPActive
[OUT] Specifies TRUE if the card write protect is active in the
PRR.
ReadyActive
[OUT] Specifies TRUE if the READY signal is active in the PRR.
WaitRequired
[OUT] Specifies TRUE if the WAIT signal is required for memory
cycles.
IOAccess
[OUT] Specifies one of the following I/O access options:
Value
Description
1
Indicates 8-bit only.
2
Indicates that 8-bit access to 16-bit memory is
unsupported.
3
Indicates that 8-bit access to 16-bit memory is
supported.
NumIOAddrLines
[OUT] Specifies the number of I/O address lines. If 0, the
socket controller provides address decode. If the number is from 1
through 26, the value is the number of address lines decoded.
Requirements
Runs on
Versions
Defined in
Include
Link to
Windows CE OS
1.0 and later
Note This API is part of the
complete Windows CE OS package as provided by Microsoft. The
functionality of a particular platform is determined by the
original equipment manufacturer (OEM) and some devices may not
support this API.